The SiGe HBT has significant advantages over a silicon bipolar junction transistor (BJT) in gain, frequency response, noise parameters, and retains an ability to integrate with CMOS devices at relatively low cost. Cutoff frequencies (Ft) of SiGe HBT devices have been reported to exceed 300 GHz, which is favorable as compared to GaAs devices. However, GaAs devices are relatively high in cost and cannot achieve the level of integration, such as, for example, of BiCMOS devices. The silicon compatible SiGe HBT provides a low cost, high speed, low power solution that is quickly replacing other compound semiconductor devices.
Advantages of SiGe are realized by a bandgap reduction creating an energy band offset at the Si—SiGe heterojunction(s) of the HBT, thereby resulting in increased current densities for a given base-emitter bias and higher gains. Also, a lower resistivity is possible with addition of Ge to a Si lattice. The higher current densities and lower base resistance values allow improved unity gain cutoff frequencies and maximum oscillation frequencies than comparable silicon BJTs, and are comparable to other compound devices such as GaAs. However, the emitter collector breakdown voltage (especially BVCEO) is inversely proportional to the current gain (β). The structural and process changes required to enhance Ft and reduce power lead to higher and higher current gains and hence lower and lower collector-emitter breakdown voltages.
Elevated Ge fractions result in an increase in base recombination current and a reduction in current gain for a given layer thickness and doping level. This effect has been confirmed experimentally to extend beyond 30% Ge. References on detect formation in pseudomorphic SiGe with high Ge content suggests the effect will continue to increase for Ge fractions well above 40% (i.e., Kasper et al., “Properties of Silicon Germanium and SiGe:Carbon,” INSPEC, 2000). Therefore, a compromise of increasing the Ge fraction high enough to reduce current gain in high-speed devices provides a way to compensate for an inevitable increase in gain and degradation of BVCEO as basewidths continue to shrink.
However, there is a limit to how much Ge can be added to the Si lattice before excess strain relaxation and gross crystalline defects occur. A critical thickness (hc) of a SiGe layer that is lattice matched to the underlying silicon is a function of (1) percentage of Ge; (2) SiGe film thickness; (3) cap layer thickness; (4) temperature of HBT filmstack processing; and (5) temperature of thermal anneals following a silicon-germanium deposition. Above the critical thickness, hc, the SiGe film is in a metastable and/or unstable region, which implies it will relax readily with a large enough application of thermal energy. Therefore, the degree of metastability is largely a function of percent Ge, SiGe layer thickness, cap layer thickness, and process induced strain due to thermal energy. Construction of a SiGe base of a conventional SiGe HBT described to date is that of a stable, pseudomorphic, or lattice-matched layer. Contemporaneous state-of-the-art procedures include growing stable, strained or lattice-matched alloys of SiGe with carbon to prevent spreading of the boron profile in the base region.
Metastable film growth is typically avoided due to the fact that relaxation results in lattice imperfections. These imperfections result in recombination centers; hence, a reduction in minority carrier lifetime (τb) and an increase in base recombination current (IRB) occurs. If not controlled, a resultant poor crystal quality due to lattice imperfections will degrade device performance. “Bridging” defects will also lead to excessive leakage current along with extremely low current gain. The film will also be very sensitive to process induced thermal stresses and therefore will not be manufacturable. Therefore, to avoid this type of degradation, the HBT designs to date result in a device with a base region that is in the stable region of film growth, which equates to a SiGe thickness that is equal to or below the critical thickness, hc.
Properties of metastable SiGe are discussed in several papers such as D. C. Houghton, “Strain Relaxation Kinetics in Si1-xGex/Si Heterostructures,” Journal of Applied Physics, Vol. 70, pp. 2136-2151 (Aug. 15, 1991), and G. S. Kar et al. “Effect of carbon on lattice strain and hole mobility in Si1-xGex alloys,” Dept. of Physics and Meteorology, Indian Institute of Technology, Kharagpur 721302, India, Journal of Materials Science: Materials in Electronics, Vol. 13, pp. 49-55 (2002). Further, U.S. Pat. No. 6,586,297 (“the '297 patent”) and U.S. Pat. No. 6,781,214 (“the '214 patent”), to U'Ren et at describe a “Metastable Base in a High-Performance HBT” and a “Method for Integrating a Metastable Base into a High Performance HBT and Related Structure,” respectively.
The '297 patent describes a heterojunction bipolar transistor that includes a metastable epitaxial silicon-germanium base on a single crystal collector and an emitter situated over a metastable epitaxial SiGe base.
The metastable epitaxial SiGe base is grown in an epitaxial reactor where the metastable epitaxial SiGe base is a strained crystalline structure including a conductivity altering dopant incorporated in-situ during film growth; the dopant is added for the sole purpose of establishing a specific conductivity type. The '297 patent describes a method that includes a short thermal anneal at temperatures of 900° C. to 950° C. to avoid relaxing the metastable SiGe film layer.
The '214 patent describes a heterojunction bipolar transistor fabricated by forming a metastable epitaxial SiGe base on a collector with a concentration of germanium greater than 20 atomic percent. An emitter is then fabricated over the metastable epitaxial SiGe base. The emitter is doped with an n- or p-type impurity depending on the transistor type, npn or pnp. The HBT is then heated in a spike anneal process to maintain the metastable epitaxial silicon-germanium base as a strained crystalline structure and to diffuse the dopants to form the emitter-base junction. The metastable epitaxial SiGe base is grown in an epitaxial reactor where the metastable epitaxial SiGe base is strained crystalline structure including a dopant incorporated in-situ during film growth; the dopant is added for the sole purpose of establishing a specific conductivity type. The '214 patent describes a method that includes a short thermal anneal at temperatures of 900° C. to 950° C. to avoid relaxing the metastable SiGe film layer.
However, the methods described in these afore-mentioned references for forming a metastable SiGe film are still very susceptible to adverse effects of thermal stress such as slip dislocations and threading dislocations; all of which are associated with film relaxation. In highly metastable films, relaxation can take place during extremely short time intervals during an anneal process, depending on the degree of metastability, such as the first fraction of a second during a short anneal and/or a flash anneal process.
Therefore, what is needed is a method to grow and integrate strain-compensated metastable SiGe layers for application to a SiGe HBT. Such a method should allow a skilled artisan to, for example, control and utilize defect density for device optimization, achieve extremely high energy band offsets and grades (ΔEG(0) & ΔEG(grade)) without incurring excess “bridging” defects, such as slip or threading dislocations, and provide a method to achieve high volume manufacturability of films that would normally be unreliable and/or unrepeatable due to their extremely metastable or even unstable properties.
Each of these improvements allows the use of films that would otherwise be highly metastable (or even unstable) films in order to realize the advantages offered with high concentrations of Ge.